Not a whole lot, honestly. Two different ways to say the same thing. Verilog seems more lower-level, but that may be because that's what we did with them at the time/how I remember it. Verilog's syntax is more C-like, which is deceptive, because you can't think of it like you would normal software development. Our instructor said it's mostly a west-coast/east-coast thing and that Verilog is more common on the west coast, but I had only used Verilog before, so... Dunno.